MPW PLANNING

MPW Shuttle Schedule & Foundry Coverage

A multi-project wafer (MPW) shuttle lets several designs share one mask set so each team pays only for its portion of the wafer. This page maps which foundries offer MPW at which nodes, the typical shuttle windows for each platform, and how to request the live schedule for your target process.

MPW service overview

Common MPW use cases

✓First silicon for a new ASIC or SoC
✓Architecture and IP validation
✓Early customer sampling
✓Low-volume or research designs

Instead of launching a dedicated wafer, designs are grouped into scheduled shuttle runs. Missing a tape-out deadline usually means waiting for the next shuttle, which can delay silicon by weeks or months.

FOUNDRY COVERAGE

MPW nodes by foundry

Each foundry runs its own shuttle program at its own set of nodes. The list below reflects MPW coverage across the foundries TOMPW coordinates; click through for the full profile and TOMPW support scope.

TSMC

Profile →

0.13µm CMOS (BCD / Logic-MS-RF)90nm65nm40nm28nm (HPC/HPC+)22nm ULL16nm FinFET7nm FinFET

Broadest advanced-node MPW through the TSMC shuttle program; advanced-node windows are evaluated case by case.

UMC

Profile →

0.18µm0.13µm90nm55nm40nm28nm14nm

Strong mixed-signal, RF, HV, BCD and eFlash MPW platforms for IoT, display driver and power applications.

GlobalFoundries

Profile →

22nm FDSOI (22FDX)12nm LP+28nm SLPe45nm RF SOI45RFE55nm BCDlite130nm BCDliteSiGe 8XP

Differentiated specialty portfolio; 22FDX FD-SOI is a unique low-power MPW differentiator.

SMIC

Profile →

0.35µm0.18µm0.13µm90nm55nm40nm28nm14nm

Deep mature-to-mainstream MPW coverage with competitive cost for Asia-based supply chains.

Tower

Profile →

0.18µm / 0.13µm mixed-signal0.11µmSiGe / RF SOIMEMSPMIC / BCD

Specialty foundry focused on analog, RF, photonics and MEMS MPW platforms.

IHP

Profile →

SiGe BiCMOS (SG13 / SG25)RF CMOSPhotonic IC (PIC)0.13 / 0.25 µm

Premier SiGe BiCMOS and photonics research foundry; MPW shuttles for RF, mmWave and optical engines.

X-FAB

Profile →

0.18µm HV CMOS / NVM0.13µm RF SOI0.35µm HV CMOSMEMSSOI

Specialty analog and mixed-signal foundry with strong HV, SOI and MEMS MPW platforms.

DB Hitek (Dongbu)

Profile →

0.18µm Analog / BCD0.15µm BCD0.13µm SOI0.11µm Mixed-Signal / RF

Specialty analog, BCD and mixed-signal foundry (operates as Dongbu Electronics) for power and sensor applications.

Samsung Foundry

Profile →

3nm (SF3 GAA)4nm (SF4X)5nm (SF5)8nm (8LPU)14nm (14LPP/LPU)28nm (28LPP/28FDS)65nm130nm

Broad node roadmap from 130nm to 3nm GAA; MPW runs through the B2B CONNECT reservation system with secure, isolated prototype flows.

ams OSRAM

Profile →

0.18µm Analog / Mixed-Signal0.35µm HV / BCD15+ MPW shuttles / year

One of the most frequent MPW programs in the industry (15+ analog/mixed-signal shuttles per year), accessed via broker channels such as EUROPRACTICE.

VIS (Vanguard)

Profile →

0.11µm – 0.5µmBCD / HV CMOSAnalog / Mixed-SignalDisplay driver

Taiwan specialty foundry strong in power, analog and display-driver platforms across mature nodes.

PSMC (Powerchip)

Profile →

0.18µm – 28nmCMOS / BCD / HVMixed-SignalEmbedded memory

Taiwan foundry with broad mature-to-mainstream coverage and specialty logic/mixed-signal platforms.

SilTerra

Profile →

0.13µm – 1.0µmCMOS / MEMS / RFBCD / HVSensor platforms

Malaysia pure-play foundry with regular CMOS, MEMS and RF MPW programs across mature nodes.

WIN Semiconductors

Profile →

GaAs pHEMT (0.10 / 0.15µm)GaN HEMT (0.10 / 0.15µm)RF / mmWaveCompound semiconductor

World's largest pure-play compound-semiconductor foundry; regular GaAs/GaN MPW shuttles for RF and mmWave applications.

CanSemi

Profile →

0.18µm – 40nmCMOS / BCD / HVPMIC / CISMixed-Signal

China-based foundry for analog, mixed-signal, PMIC and CIS platforms from 180nm to 40nm.

CSMC

Profile →

0.13µm – 1.0µmBCD / CMOS / HVPower analogSmartcard / security

China-based foundry with deep mature-node BCD, CMOS and HV analog coverage for power and industrial designs.

SJ SEMI

Profile →

0.35µm – 40nmBCD / HV CMOSAutomotive-gradePower IC / analog

China specialty foundry for BCD, HV and automotive-grade power/analog platforms.

HLMC

Profile →

28nm – 90nmCMOS / RF CMOSEmbedded memory / CISMixed-Signal

China-based foundry for mainstream logic and specialty nodes from 28nm to 90nm.

Sanan

Profile →

GaAs pHEMT / HBTGaN-on-Si HEMTSiC (MOSFET / SBD)InP / VCSEL

China's leading compound-semiconductor foundry for RF, power and photonic devices (platform-based, not standard CMOS MPW).

XMC

Profile →

0.13µm – 45nmNOR FlashCIS (image sensor)MEMS / analog

China specialty foundry focused on NOR Flash, CMOS image sensors and MEMS/analog across mature nodes.

Silex Microsystems

Profile →

MEMS (surface / bulk)SOI MEMSWafer-level packagingTSV

World-leading pure-play MEMS foundry in Sweden (part of Sai MicroElectronics); process- and design-based engagements.

AWSC

Profile →

GaAs pHEMT (0.1 / 0.15 / 0.25 µm)GaAs HBT / InGaP HBTVCSELIntegrated Passive Devices (IPD)

Taiwan pure-play GaAs foundry for RF/microwave; pHEMT and HBT platforms for PA, WiFi/5G and optical devices.

Dynax

Profile →

GaN HEMT 0.45 µmGaN HEMT 0.25 µmGaN HEMT 0.15 µmGaN HEMT 0.1 µm

China-based GaN RF foundry; wafer foundry on 0.45–0.1 µm GaN HEMT for comms, radar and RF energy.

STMicroelectronics

Profile →

BCD (BCD8 / BCD9s)SiGe BiCMOS (B55 / B55X, 300 mm)FD-SOIRF-SOIMEMSSiCGaN (STi²GaN)

European IDM with premium-foundry model; BCD, SiGe BiCMOS, FD-SOI, RF-SOI, MEMS, SiC and GaN specialty technologies.

NSI (SMIC Ningbo)

Profile →

200 mm (8-inch) specialtyRF front-end (PA / switch / filter)MEMS sensorsHigh-voltage analog / BCD

China specialty foundry (SMIC Ningbo) on 200 mm lines; RF front-end, MEMS and high-voltage analog, incl. BAW (SASFR) filters.

SK Key Foundry

Profile →

0.11µm – 0.35µm BCD / CMOSAnalog / Mixed-SignalPower IC / PMIC / DDICeNVMSiC MOSFET (development)

Korea-based 200mm specialty foundry (ex-MagnaChip, SK Group) with analog/mixed-signal, power BCD, eNVM and SiC MOSFET platforms; runs an MPW shuttle program.

Sai Micro

Profile →

8-inch MEMSSurface / bulk micromachiningSOI MEMSBAW / RF filtersWafer-level packaging

China-based pure-play MEMS foundry (Beijing 8-inch line + Silex Sweden); sensors, BAW, optical MEMS and micro-fluidics. Process- and design-based engagements.

SHUTTLE WINDOWS

Representative MPW shuttle calendar

The calendar marks, by month, whether a node commonly has an indicative shuttle window for 8 foundries and 54 MPW platforms, based on publicly documented cadence. It is a month-level planning reference — exact registration cut-off and GDS submission deadlines are confirmed per project because foundry calendars shift with demand and capacity.

Indicative month-level planning reference. Current availability, registration cut-off and GDS submission deadlines must be confirmed for each project.

GlobalFoundries

Profile →

Process / Node	Jan	Feb	Mar	Apr	Jun	Jul	Aug	Sep	Nov	Dec
SiGe 8XP			●		●			●		●
130nm BCDlite – Gen2			●					●
55 nm BCDlite			●		●			●		●
45RFE		●					●
45nm SPCLO – Silicon Photonics		●					●			●
28 nm SLPe			●					●	●
22 nm FDSOI	●	●		●	●	●		●	●
12 nm LP+	●						●

IHP

Profile →

Process / Node	Feb	Mar	May	Jul	Oct	Nov
SG13C SiGe:C RF CMOS			●	●		●
SG13G2 SiGe:C Bipolar/Analog			●	●		●
SG13G2Cu (FEOL process SG13G2 + Cu BEOL option from X-FAB)		●		●		●
SG13G3Cu (FEOL process + Cu BEOL option from X-FAB)				●		●
SG13G3 (FEOL process SG13G3Cu + Al-BEOL option)*				●		●
SG13S SiGe:C Bipolar/Analog			●	●		●
SG13SCu (FEOL process SG13S + Cu BEOL option from X-FAB)		●		●		●
MEMRES for SG13S			●			●
SG25 PIC (Photonics, Ge Photo-diode, BEOL)				●
SG25H5_EPIC high performance BiCMOS + Photonic					●
BEOL SG13 (M1 and Metal Layers Above) + optional LBE or TSV or RDL	●

TSMC

Profile →

Process / Node	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov	Dec
0.13µm CMOS BCD plus (12-inch)	●				●		●				●
0.13µm CMOS Logic or MS/RF, GP or LP (12-inch)	●				●		●				●
90nm CMOS Logic or MS/RF, GP or LP			●			●		●				●
65nm CMOS Logic or MS/RF, GP or LP		●	●		●	●			●		●
40nm CMOS Logic or MS/RF, LP (no triple gate oxide)		●	●	●	●		●	●	●	●	●
40nm CMOS Logic or MS/RF, GP (no triple gate oxide)		●		●				●		●
28nm CMOS Logic or RF HPC/HPC+	●	●			●		●		●	●	●
22nm CMOS Logic or RF ULL		●	●	●		●		●		●
16nm CMOS Logic or RF FinFET Compact		●		●	●		●		●		●
7nm CMOS Logic FinFET	●			●						●

UMC

Profile →

Process / Node	Jan	Feb	Mar	Apr	Jun	Jul	Aug	Sep	Oct	Nov
28N Logic/Mixed-Mode – HPC		●		●		●	●		●
40N Logic/Mixed-Mode – LP			●		●	●	●			●
65N Logic/Mixed-Mode/RF – LL	●	●						●	●
L110AE Logic/Mixed-Mode/RF		●			●			●		●
L180 Logic GII, Mixed-Mode/RF			●				●

X-FAB

Profile →

Process / Node	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov
T011 0.11µ HV SOI CMOS			●		●			●			●
R013 0.13µ RF SOI CMOS *		●						●
R013 0.13µ XIPD					●						●
H018 0.18µ HV NVM CMOS E-FLASH	●		●			●				●
P018 0.18µ NVM CMOS *	●				●				●
T018 0.18µ HV SOI CMOS		●		●				●			●
S018 0.18µ OPTO *		●					●
H035 0.35µ HV CMOS			●					●			●
MB10 MEMS									●

DB Hitek (Dongbu)

Profile →

Process / Node	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov	Dec
Analog /BCD (AN07/AN180/HP180 BD180LV/BD180MV/ BD180XH/BD180XA) 0.18µm	●	●	●	●	●	●	●	●	●	●	●	●
Analog/BCD (BEOL 0.15um BD18LVA/AN180 Gen2) 0.15µm	●		●		●		●		●		●
BCD (BD180XA) 0.18µm			●						●
Analog/BCD SOI (BD130/RS13) 0.13µm		●			●			●			●
Mixed Signal/RF HRS 0.11µm	●			●			●			●

Samsung Foundry

Profile →

Process / Node	Jan	Apr	May	Aug	Sep
28nm (28LPP)		●
65nm (LF6/LF6S)		●		●
130nm (BCD)	●		●		●

WIN Semiconductors

Profile →

Process / Node	Mar	Jun	Sep	Dec
NP12-1B (GaAs)	●	●	●	●
PIN1-11 (GaAs)		●
PP10-29 (GaN)				●

Blank cells mean no public month-level reference is recorded for that node in that month. Windows reflect publicly documented MPW cadence and are confirmed per project — tell us your target foundry and node and we will lock the live run.

SHUTTLE CADENCE

Typical MPW frequency by node band

Cadence is not uniform. It follows a monthly or quarterly rhythm that depends on foundry, technology node, process maturity and demand. Use the table below as a planning reference rather than a guarantee of a specific date.

Node band	Typical MPW frequency	Planning note
Mature (≥180nm)	Monthly to quarterly	Frequent windows; often the easiest to align with a program timeline.
130nm – 65nm	Monthly to quarterly	Broad fab availability across multiple qualified platforms.
40nm – 28nm	Quarterly, multiple windows/year	Popular nodes run several shuttles per year at major fabs.
22nm – 14nm (FinFET/FF)	2–4× per year	Less frequent, more structured calendars; qualification often required.
≤7nm advanced	2–4× per year	Fixed calendars with higher minimum participation and lead-time planning.

VISUAL SUMMARY

Shuttle density at a glance

The same cadence data from the tables above, drawn as a yearly rhythm. Mature-node programs can usually find a window every month, while advanced-node teams plan around a few fixed slots.

Denser rows = more frequent shuttle windows. Mature nodes often run monthly; advanced nodes typically 2–4× per year.

PRICING LOGIC

Why MPW pricing varies by run

MPW pricing is not fixed. It depends on the specific run you target, so generic estimates are rarely useful. The meaningful question is the price for an exact shuttle at your chosen foundry and node.

Foundry and process node
Die size and reticle utilization
Number of metal layers
Optional process modules
Shuttle demand and available capacity

NEXT MOVE

Request the live schedule and pricing

Tell us your target foundry, process node, approximate die size and preferred shuttle window. You do not need a finalized GDS to start the conversation — a lightweight brief is enough to confirm availability and pricing for the relevant run.

Email project brief

FAQ

Questions about MPW scheduling

A multi-project wafer run where several customer designs share one mask set. Each participant pays for a portion of the wafer instead of a dedicated reticle, which dramatically lowers mask and fabrication cost for prototype and low-volume silicon.

Cadence depends on foundry, process node, process maturity and demand. Mature nodes commonly run monthly or quarterly, while advanced nodes typically offer two to four windows per year. Missing a tape-out deadline usually means waiting for the next shuttle.

The calendar marks, by month, whether a node commonly has an indicative shuttle window, based on publicly documented foundry cadence. It is a planning reference only — exact registration cut-off and GDS submission deadlines shift with demand and capacity, so the live run is confirmed per project. Use it to plan tape-out rhythm, then tell us your target foundry and node to lock the current window.

Yes. Many teams validate first silicon through MPW or NTO, then move into full mask once the design and commercial outlook are clearer. Planning that transition early avoids a costly process port later.

CALCULATORS

Estimate cost and dies with free calculators

View all tools

MPW Shuttle Schedule & Foundry Coverage

Common MPW use cases

MPW nodes by foundry

TSMC

UMC

GlobalFoundries

SMIC

Tower

IHP

X-FAB

DB Hitek (Dongbu)

Samsung Foundry

ams OSRAM

VIS (Vanguard)

PSMC (Powerchip)

SilTerra

WIN Semiconductors

CanSemi

CSMC

SJ SEMI

HLMC

Sanan

XMC

Silex Microsystems

AWSC

Dynax

STMicroelectronics

NSI (SMIC Ningbo)

SK Key Foundry

Sai Micro

Representative MPW shuttle calendar

GlobalFoundries

IHP

TSMC

UMC

X-FAB

DB Hitek (Dongbu)

Samsung Foundry

WIN Semiconductors

Typical MPW frequency by node band

Shuttle density at a glance

Why MPW pricing varies by run

Request the live schedule and pricing

Questions about MPW scheduling

Estimate cost and dies with free calculators

Die Per Wafer Calculator

MPW Cost Sharing Calculator

Wafer & Unit Cost Calculator

Node / Wafer DPW Comparison

Tape-out Budget Estimator

Package Selection Advisor

Test Cost & Yield Calculator