MPW / Shuttle access

Silex Microsystems Wafer-level packaging MPW

Plan a Wafer-level packaging multi-project wafer run at Silex Microsystems through TOMPW Service. We coordinate shared-mask access, EDA sign-off, shuttle scheduling and the downstream packaging or test path for global chip teams.

Node: Wafer-level packagingMPW, NTO and production evaluation

Why Wafer-level packaging

Wafer-level packaging is one of the process options TOMPW coordinates as a shared-mask MPW run at the partner foundry. We handle slot selection, EDA checks and logistics so your design reaches the line on schedule.

What a Wafer-level packaging MPW at Silex Microsystems involves

A Wafer-level packaging MPW (multi-project wafer) shuttle places several customer designs on one shared mask set, so each team pays only for its portion of the wafer. TOMPW Service handles slot selection, DRC/LVS review and logistics so your GDSII reaches Silex Microsystems's line on schedule.

✓Pure-play MEMS process development

✓MEMS prototyping and volume production

✓Wafer-level MEMS packaging

✓Design-enablement support

Technologies & platforms at Wafer-level packaging

MEMS

Sensor fabrication

Microfluidics

Optical MEMS

Notes for Wafer-level packaging programs

Silex is a dedicated MEMS foundry (no standard CMOS MPW shuttle); engagements are process- and design-based.
TOMPW can help scope a Silex MEMS program from prototyping to volume.

Best-fit applications

Inertial and pressure sensorsOptical and microfluidic MEMSBioMEMS and medical devicesMEMS foundry engagement

Expert reviewed

This page is reviewed by Henry, CEO, TOMPW Service. Henry is the CEO of TOMPW Service and a chip-design specialist with 20 years in the semiconductor industry.

Discuss a Wafer-level packaging MPW at Silex Microsystems

TOMPW Service can coordinate a Wafer-level packaging MPW shuttle with Silex Microsystems as part of a scoped execution path.

Email for a Quote

COMMON QUESTIONS

Working with Silex Microsystems Wafer-level packaging MPW through TOMPW

Can TOMPW arrange a Wafer-level packaging MPW shuttle at Silex Microsystems?

Yes. TOMPW coordinates Wafer-level packaging MPW and shuttle access at Silex Microsystems for overseas teams, handling slot selection, EDA checks and logistics so your design reaches the shared mask on schedule.

What does a Wafer-level packaging MPW run at Silex Microsystems typically include?

A Wafer-level packaging MPW run bundles your design onto a shared reticle with other projects, covering mask share, wafer fabrication at Silex Microsystems, and standard probe. Packaging, final test and NTO transition are planned separately with TOMPW.

How long does a Wafer-level packaging MPW cycle take at Silex Microsystems?

Cycle time depends on Silex Microsystems's shuttle cadence for Wafer-level packaging, usually a few months from mask data to returned wafers. Missing a window means waiting for the next one, so TOMPW recommends booking early.

What comes after a Wafer-level packaging MPW at Silex Microsystems?

After a successful Wafer-level packaging MPW, teams typically move to NTO or full-mask production. TOMPW helps plan that transition, including package selection, test development and volume ramp through Silex Microsystems and downstream partners.

RELATED FOUNDRY PROFILES

Other foundries teams compare Silex Microsystems with

Sai MicroMPW & access →SMICMPW & access →TowerMPW & access →X-FABMPW & access →

RELATED SERVICES