MPW / Shuttle access

HLMC 55nm MPW

Plan a 55nm multi-project wafer run at HLMC through TOMPW Service. We coordinate shared-mask access, EDA sign-off, shuttle scheduling and the downstream packaging or test path for global chip teams.

Node: 55nmMPW, NTO and production evaluation

Why 55nm

55nm is a low-cost node combining CMOS with embedded flash and BCD for value-focused designs. TOMPW coordinates 55nm MPW access for cost-sensitive programs.

Typical applications

✓MCU and embedded flash
✓PMIC and analog
✓Consumer and IoT chips

What a 55nm MPW at HLMC involves

A 55nm MPW (multi-project wafer) shuttle places several customer designs on one shared mask set, so each team pays only for its portion of the wafer. TOMPW Service handles slot selection, DRC/LVS review and logistics so your GDSII reaches HLMC's line on schedule.

✓Mainstream-node MPW coordination

✓Logic and mixed-signal platform support

✓Embedded memory integration

✓Cost-optimized production

Technologies & platforms at 55nm

CMOS

RF CMOS

Embedded memory

CIS

Mixed-Signal

Notes for 55nm programs

HLMC provides mainstream-node coverage complementary to other China-based fabs.
TOMPW can coordinate HLMC programs for Asia-based supply chains.

Best-fit applications

Consumer and communication chipsMixed-signal and embedded applicationsIndustrial and automotive programsCost-sensitive production

Expert reviewed

This page is reviewed by Henry, CEO, TOMPW Service. Henry is the CEO of TOMPW Service and a chip-design specialist with 20 years in the semiconductor industry.

Discuss a 55nm MPW at HLMC

TOMPW Service can coordinate a 55nm MPW shuttle with HLMC as part of a scoped execution path.

Email for a Quote

COMMON QUESTIONS

Working with HLMC 55nm MPW through TOMPW

Can TOMPW arrange a 55nm MPW shuttle at HLMC?

Yes. TOMPW coordinates 55nm MPW and shuttle access at HLMC for overseas teams, handling slot selection, EDA checks and logistics so your design reaches the shared mask on schedule.

What does a 55nm MPW run at HLMC typically include?

A 55nm MPW run bundles your design onto a shared reticle with other projects, covering mask share, wafer fabrication at HLMC, and standard probe. Packaging, final test and NTO transition are planned separately with TOMPW.

How long does a 55nm MPW cycle take at HLMC?

Cycle time depends on HLMC's shuttle cadence for 55nm, usually a few months from mask data to returned wafers. Missing a window means waiting for the next one, so TOMPW recommends booking early.

What comes after a 55nm MPW at HLMC?

After a successful 55nm MPW, teams typically move to NTO or full-mask production. TOMPW helps plan that transition, including package selection, test development and volume ramp through HLMC and downstream partners.

RELATED FOUNDRY PROFILES

Other foundries teams compare HLMC with

UMCMPW & access →SMICMPW & access →PSMC (Powerchip)MPW & access →CanSemiMPW & access →

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