MPW / Shuttle access
Nexchip 0.18μm MPW
Plan a 0.18μm multi-project wafer run at Nexchip through TOMPW Service. We coordinate shared-mask access, EDA sign-off, shuttle scheduling and the downstream packaging or test path for global chip teams.
Why 0.18μm
0.18μm is one of the process options TOMPW coordinates as a shared-mask MPW run at the partner foundry. We handle slot selection, EDA checks and logistics so your design reaches the line on schedule.
What a 0.18μm MPW at Nexchip involves
A 0.18μm MPW (multi-project wafer) shuttle places several customer designs on one shared mask set, so each team pays only for its portion of the wafer. TOMPW Service handles slot selection, DRC/LVS review and logistics so your GDSII reaches Nexchip's line on schedule.
Step 1
GDSII & spec
Share your GDSII, target node and tape-out window.
Step 2
Slot & mask share
TOMPW books the next shuttle and aligns mask share.
Step 3
Wafer, package, test
Wafers returned, then package/test aligned as needed.
Platforms across Nexchip
Foundry-level platforms, not a list of everything 0.18μm offers. Which of these apply to your 0.18μm run is confirmed per project.
Notes on working with Nexchip
- Nexchip is especially competitive for display driver and power management ICs.
- TOMPW can coordinate high-volume production on mature nodes.
Best-fit applications
Expert reviewed
This page is reviewed by Henry, CEO, TOMPW Service. Henry is the CEO of TOMPW Service and a chip-design specialist with 20 years in the semiconductor industry.
Discuss a 0.18μm MPW at Nexchip
TOMPW Service can coordinate a 0.18μm MPW shuttle with Nexchip as part of a scoped execution path.
Email for a QuoteCOMMON QUESTIONS
Working with Nexchip 0.18μm MPW through TOMPW
Can TOMPW arrange a 0.18μm MPW shuttle at Nexchip?
Yes. TOMPW coordinates 0.18μm MPW and shuttle access at Nexchip for overseas teams, handling slot selection, EDA checks and logistics so your design reaches the shared mask on schedule.
What does a 0.18μm MPW run at Nexchip typically include?
A 0.18μm MPW run bundles your design onto a shared reticle with other projects, covering mask share and wafer fabrication at Nexchip. Wafer-level probe is included only on the shuttles that offer it, so we confirm probe coverage for the specific run before you commit. Packaging, final test and the NTO transition are scoped separately with TOMPW.
How long does a 0.18μm MPW cycle take at Nexchip?
Cycle time depends on Nexchip's shuttle cadence for 0.18μm, usually a few months from mask data to returned wafers. Missing a window means waiting for the next one, so TOMPW recommends booking early.
What comes after a 0.18μm MPW at Nexchip?
After a successful 0.18μm MPW, teams typically move to NTO or full-mask production. TOMPW helps plan that transition, including package selection, test development and volume ramp through Nexchip and downstream partners.
PLAN & ESTIMATE
Calculators for your 0.18μm MPW
Estimate dies per wafer, split shared-mask cost and model unit economics before you commit to a shuttle slot.
Die Per Wafer Calculator
Count complete dies from Shot/Field layouts with flat or notched wafer boundaries, edge clearance and optional yield estimates.
Open tool →MPW Cost Sharing Calculator
Allocate an agreed MPW shared cost by booked block area and block count, without predicting delivered dies.
Open tool →Wafer & Unit Cost Calculator
Turn a wafer run into a per-chip cost: dies per wafer, yield, packaging and test, plus a target margin.
Open tool →Tape-out Budget Estimator
Full program model: DPW, yield, packaging, HBM, test, NRE and volume → unit cost, price and gross margin.
Open tool →RELATED FOUNDRY PROFILES
Other foundries teams compare Nexchip with
RELATED SERVICES
Services that pair with a Nexchip 0.18μm MPW
MPW / Fab Shuttle
Compare public shuttle windows across foundries, control first-silicon cost and move from tape-out planning to wafer delivery with one execution path.
Learn more →Full Mask / Production Foundry
Move validated designs into dedicated mask production with yield, volume and supply planning support.
Learn more →Semiconductor Packaging
Semiconductor packaging through external assembly and test providers, with TOMPW coordinating package selection, supplier review and assembly-to-test handoff.
Learn more →Test & Product Engineering
Connect CP, FT and reliability planning so packaged silicon is measurable, debuggable and ready for customer evaluation.
Learn more →Turnkey ASIC Solutions
Unify design support, tape-out, packaging, test, board work and delivery under one execution-facing partner.
Learn more →RELATED MPW NODES
Other 0.18μm and Nexchip MPW access pages
Browse adjacent shuttle nodes so comparison and scheduling research stays on one program path.
Nexchip other nodes
0.18μm at other foundries
CROSS-FOUNDRY COMPARISON
Compare 0.18μm across foundries
Compare 9 listed foundry profiles for 0.18μm, including Nexchip. Use the node comparison tool to review process and MPW planning context; public-reference profiles require separate confirmation of project access and current run options.