MPW / Shuttle access
TSMCMPW & shuttle access
TSMC is the world's largest dedicated semiconductor foundry, serving leading fabless semiconductor companies. TOMPW Service supports MPW shuttle access, NTO coordination and production mask programs with TSMC across multiple nodes.
Supported process nodes
13 MPW nodes at TSMC
Each node links to a dedicated planning page with calculators and shuttle context.
3nm MPW
Plan a shared-mask run at TSMC on the 3nm node.
Plan this node →5nm MPW
Plan a shared-mask run at TSMC on the 5nm node.
Plan this node →7nm MPW
Plan a shared-mask run at TSMC on the 7nm node.
Plan this node →12nm MPW
Plan a shared-mask run at TSMC on the 12nm node.
Plan this node →16nm MPW
Plan a shared-mask run at TSMC on the 16nm node.
Plan this node →22nm MPW
Plan a shared-mask run at TSMC on the 22nm node.
Plan this node →22ULP MPW
Plan a shared-mask run at TSMC on the 22ULP node.
Plan this node →22ULL MPW
Plan a shared-mask run at TSMC on the 22ULL node.
Plan this node →28nm MPW
Plan a shared-mask run at TSMC on the 28nm node.
Plan this node →40nm MPW
Plan a shared-mask run at TSMC on the 40nm node.
Plan this node →65nm MPW
Plan a shared-mask run at TSMC on the 65nm node.
Plan this node →90nm MPW
Plan a shared-mask run at TSMC on the 90nm node.
Plan this node →Mature nodes MPW
Plan a shared-mask run at TSMC on the Mature nodes node.
Plan this node →MPW SHUTTLE PLAN
Shuttle windows at TSMC by process node
The months below mark where a window commonly opens on each platform. A run launches once it fills, so read this as planning rhythm rather than a bookable date — send TOMPW your node and target quarter and we will tell you which run you can actually join.
0.13µm CMOS BCD plus (12-inch)
0.13µm CMOS Logic or MS/RF, GP or LP (12-inch)
90nm CMOS Logic or MS/RF, GP or LP
65nm CMOS Logic or MS/RF, GP or LP
40nm CMOS Logic or MS/RF, LP (no triple gate oxide)
40nm CMOS Logic or MS/RF, GP (no triple gate oxide)
28nm CMOS Logic or RF HPC/HPC+
22nm CMOS Logic or RF ULL
16nm CMOS Logic or RF FinFET Compact
7nm CMOS Logic FinFET
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Next step
Send node, package and schedule context first — we scope the right path after that.
A strong first MPW inquiry lists the target node, application, program stage and volume, plus whether package, test, PCB or firmware support are also needed.