ISSCC is the reference conference for solid-state circuits and system-on-chip work. For teams planning silicon, it is useful in two distinct ways: as an early signal of what circuit techniques are becoming practical, and as a reality check on how far published results sit from anything shippable.
This article documents what is verifiable about the conference and how to read it. Earlier editions are listed with an explicit verification status rather than guessed at.
What ISSCC Actually Is
The International Solid-State Circuits Conference is sponsored by the IEEE Solid-State Circuits Society and is described by the organisers as the foremost global forum for presentation of advances in solid-state circuits and systems-on-a-chip.
The technical programme is organised by subcommittees — thirteen of them in 2026 — and includes tutorials, advanced circuit design forums, a short course, demonstration sessions and a student research preview alongside the paper sessions.
The 2026 Edition, Verified
The 73rd ISSCC was held 15–19 February 2026 at the San Francisco Marriott Marquis, San Francisco, California. The conference theme was "Advancing AI with IC & SoC Innovations". Edith Beigné served as conference chair, reported as the first female conference chair in the conference's history, with Keith Bowman as programme chair.
Scale, from the IEEE's published conference report: 1,025 submissions, a record for the third consecutive year and 66% above the 2014–2023 ten-year average; 265 technical papers accepted including eight invited, a 26% acceptance rate and 31% above the ten-year average; roughly 2,850 paid attendees, 94% in person.
Author affiliation of accepted papers was reported as 66% academic, 20% industry, 2% research institute and 12% joint collaborations. That distribution is the single most important fact for how to read the proceedings.
- The programme ran 37 technical sessions, 10 tutorials, six forums and a short course.
- Selection was made by a technical programme committee of 213 experts.
- Plenary speakers were Rick Tsai (MediaTek), Heike Riel (IBM Research), Anirudh Devgan (Cadence) and Hope Giles (Apple).
The 2026 Programme Map: 37 Sessions, Grouped
The 37 paper sessions can be grouped into ten themes. Session titles are taken verbatim from the IEEE proceedings contents; the grouping itself is ours, and it exists for one practical reason: a submission lives or dies in the session it belongs to, so the fastest read of the programme is which themes carry the most sessions.
RF, wireless and radar carry the largest share, followed by AI, compute and accelerators, then imaging, sensing and biomedical circuits. A team planning a submission can use the same map in reverse — identify the two or three sessions that match the work, then read the accepted papers in those sessions from the last two editions before writing a word.
- RF, wireless and radar — sessions 5, 6, 20, 33, 34, 35 (6 sessions)
- AI, compute and accelerators — sessions 13, 17, 18, 30, 31 (5 sessions)
- Imaging, sensing and biomedical — sessions 3, 7, 21, 29, 36 (5 sessions)
- Power, energy and harvesting — sessions 9, 16, 19, 26 (4 sessions)
- Processors, digital and security — sessions 2, 10, 25 (3 sessions)
- Wireline, optical and interconnect — sessions 8, 14, 23 (3 sessions)
- Analog, frequency and clocking — sessions 4, 12, 27 (3 sessions)
- Displays, environments and the wildcard track — sessions 22, 24, 28 (3 sessions)
- Memory — sessions 15, 37 (2 sessions)
- Data converters — sessions 11, 32 (2 sessions)
- Plenary, invited papers — session 1 (1 session)
How Not to Over-Read a Conference Paper
With two thirds of accepted papers coming from academic affiliations, ISSCC is primarily a research venue, not a vendor qualification list. A published result demonstrates that something was achieved under laboratory conditions on a specific test chip — usually without the PVT spread, yield data, qualification evidence or supply commitment a production programme needs.
The useful extraction is directional. A technique appearing repeatedly across several years and multiple groups is moving toward practical use. A single striking result is a research milestone, and building a product plan on it is unwarranted.
- Track which topics appear over consecutive years, not which single paper has the best headline number.
- Treat reported metrics as achieved on a test chip in stated conditions, not as producible specifications.
- Expect a multi-year gap between a first demonstration and availability as qualified, supported IP.
- Ask any vendor citing a paper whether the result is available in silicon you can buy and for which PDK version.
Future Dates
The organisers publish tentative future dates. They are explicitly listed as tentative and should be rechecked before booking travel or planning submission timing.
- ISSCC 2027: 14–18 February (tentative)
- ISSCC 2028: 20–24 February (tentative)
- ISSCC 2029: 18–22 February (tentative)
- ISSCC 2030: 17–21 February (tentative)
- ISSCC 2031: 16–20 February (tentative)
- ISSCC 2032: 15–19 February (tentative)
Earlier Editions: Verification Status
This article deliberately does not publish per-year entries for editions before 2026. Doing so would require stating each year's dates, venue and technical themes as fact, and those figures would have to be confirmed against the conference's own archive before they carry any weight.
Editions from 2010 through 2025 are therefore recorded here as **待核实 (pending verification)**. If your programme depends on a specific earlier edition — for prior art review, publication planning or trend analysis — treat any date or theme found in secondary sources as unverified until checked against IEEE SSCS records.
- ISSCC 2010–2025 editions: dates, venue and themes — 待核实, not asserted here.
- 2026 figures in this article are taken from the organisers' site and the IEEE published conference report.
- Future dates are the organisers' own tentative listing, not confirmed.
